Updated schematic: J1 changed to Molex 0397730004

Updated artwork and fab drawing footprint and drill map for Molex 039773004.
Rev'ed to X02_SCH, X02_ART and X02_FAB

1_Design/CHANGELOG_ART.md

@@ -4,7 +4,7 @@ All notable changes to the layout will be documented in this file.
 
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/).
 
-## [Unreleased] - yyyy-mm-dd
+## [X02 - Unreleased] - yyyy-mm-dd
 
 ### Added
 -
@@ -13,7 +13,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/).
 -
 
 ### Changed
--
+- Changed J1 footprint to Molex 0397730004
 
 ### Removed
 -

1_Design/CHANGELOG_PCB.md

@@ -0,0 +1,34 @@
+# Changelog
+
+All notable changes to the layout will be documented in this file.
+
+The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/).
+
+## [X02 - Unreleased] - yyyy-mm-dd
+
+### Added
+-
+
+### Fixed
+-
+
+### Changed
+- Changed J1 footprint to Molex 0397730004
+- Updated drill map with updated J1 footprint
+
+### Removed
+-
+
+## [Template] - yyyy-mm-dd
+### Added
+-
+
+### Fixed
+-
+
+### Changed
+-
+
+### Removed
+-
+

1_Design/CHANGELOG_SCH.md

@@ -4,7 +4,7 @@ All notable changes to the schematic will be documented in this file.
 
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/).
 
-## [Unreleased] - yyyy-mm-dd
+## [X02 - Unreleased] - yyyy-mm-dd
 
 ### Added
 -
@@ -13,7 +13,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/).
 -
 
 ### Changed
--
+- Changed J1 JST B4B-XH-A to Molex 0397730004
 
 ### Removed
 -

1_Design/E1005_KG-SGCLOCK_PCBA.kicad_pro

@@ -1003,31 +1003,31 @@
     "art_checked_date": "<art checked date>",
     "art_checker": "D. CLARK",
     "art_eng": "D. CLARK",
-    "art_eng_date": "13.DEC.25",
-    "art_prj_eng_date": "13.DEC.25",
-    "art_rev": "X1",
+    "art_eng_date": "21.DEC.25",
+    "art_prj_eng_date": "21.DEC.25",
+    "art_rev": "X02",
     "base_pn": "E1005",
     "pcb_checked_date": "<pcb checked date>",
     "pcb_checker": "D. CLARK",
     "pcb_eng": "D. CLARK",
-    "pcb_eng_date": "13.DEC.25",
-    "pcb_prj_eng_date": "13.DEC.25",
-    "pcb_rev": "X1",
+    "pcb_eng_date": "21.DEC.25",
+    "pcb_prj_eng_date": "21.DEC.25",
+    "pcb_rev": "X02",
     "pcba_checked_date": "<pcba checked date>",
     "pcba_checker": "D. CLARK",
     "pcba_eng": "D. CLARK",
-    "pcba_eng_date": "13.DEC.25",
+    "pcba_eng_date": "21.DEC.25",
     "pcba_name": "SGC-237 Tuner Lock and Reset",
-    "pcba_prj_eng_date": "13.DEC.25",
-    "pcba_rev": "X1",
+    "pcba_prj_eng_date": "21.DEC.25",
+    "pcba_rev": "X02",
     "prj_eng": "D. CLARK",
     "prj_license": "CC BY-NC-SA",
     "prj_name": "KG-SGCLOCK",
     "sch_checked_date": "<sch checked date>",
     "sch_checker": "D. CLARK",
     "sch_eng": "D. CLARK",
-    "sch_eng_date": "13.DEC.25",
-    "sch_prj_eng_date": "13.DEC.25",
-    "sch_rev": "X1"
+    "sch_eng_date": "21.DEC.25",
+    "sch_prj_eng_date": "21.DEC.25",
+    "sch_rev": "X02"
   }
 }

2_Fabrication/drill_map/E1005_KG-SGCLOCK_PCBA.drl

@@ -1,7 +1,7 @@
 M48
-; DRILL file {KiCad 9.0.6-9.0.6~ubuntu24.04.1} date 2025-12-15T19:14:23-0800
+; DRILL file {KiCad 9.0.6-9.0.6~ubuntu24.04.1} date 2025-12-21T19:16:09-0800
 ; FORMAT={-:-/ absolute / metric / decimal}
-; #@! TF.CreationDate,2025-12-15T19:14:23-08:00
+; #@! TF.CreationDate,2025-12-21T19:16:09-08:00
 ; #@! TF.GenerationSoftware,Kicad,Pcbnew,9.0.6-9.0.6~ubuntu24.04.1
 ; #@! TF.FileFunction,MixedPlating,1,2
 FMAT,2
@@ -9,7 +9,7 @@ METRIC
 ; #@! TA.AperFunction,Plated,PTH,ViaDrill
 T1C0.300
 ; #@! TA.AperFunction,Plated,PTH,ComponentDrill
-T2C0.950
+T2C1.092
 ; #@! TA.AperFunction,Plated,PTH,ComponentDrill
 T3C1.270
 ; #@! TA.AperFunction,Plated,PTH,ComponentDrill
@@ -23,10 +23,10 @@ T1
 X30.0Y39.288
 X30.75Y39.288
 T2
-X19.75Y17.65
-X19.75Y15.15
-X19.75Y12.65
-X19.75Y10.15
+X19.75Y17.81
+X19.75Y15.27
+X19.75Y12.73
+X19.75Y10.19
 T3
 X42.225Y43.1
 X48.575Y43.1

3_Assembly/CHANGELOG_ASY.md

@@ -4,16 +4,17 @@ All notable changes to the assembly drawing will be documented in this file.
 
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/).
 
-## [Unreleased] - yyyy-mm-dd
+## [X02] - 2025-12-21
 
 ### Added
--
+- 
 
 ### Fixed
 -
 
 ### Changed
--
+- J1 JST B4B-XH-A with Molex 0397730004
+-- Termial block allows easy connection without having to connectorize the cable coming from the tuner
 
 ### Removed
 -

4_mCAD/397730004/KiCADv6/2025-12-22_00-00-39.kicad_sym

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4_mCAD/397730004/KiCADv6/footprints.pretty/CONN_SD-39773-001_04P_MOL.kicad_mod

@@ -0,0 +1,33 @@
+(footprint "CONN_SD-39773-001_04P_MOL" (version 20211014) (generator pcbnew)
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+    (effects (font (size 1 1) (thickness 0.15)))
+  )
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4_mCAD/691210910004/691210910004.txt

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+"Symbol";"Value";"Unit";
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+"Culus";"E315414";"";
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+"Torque";"0.15 Nm";"";
+"Insulator_Material";"PA66";"";
+"Withstand_Voltage_Culus_KVAC_min";"1.3";"";
+"Solder_Profile";"JEDEC lead free wave soldering process";"";
+"Locking_sytem";"Rising cage clamp";"";
+"TraceParts.PartNumber";"90-24032022-063430";"";
+"Working_Voltage_cULus_VAC";"150";"";
+"Screw";"M1.6";"";
+"REFERENCE";"691210910004";"";
+"Screw_Nut_Plating";"Zinc";"";
+"TraceParts.PartTitle";"Terminal Blocks - Rising Cage - 2.54 mm";"";
+"Orientation_1";"Horizontal";"";
+"DESIGN";"Serie 2109 Horizontal Entry with Rising Cage Clamp_2.54 mm";"";
+"Pitch";"2.54 (mm)";"";
+"TRACEPARTS";"TRACEPARTS";"";
+"SUPPLIER";"WÜRTH ELEKTRONIK";"";
+"Contact_Material";"Brass";"";
+"Wire_Guard";"Copper Alloy";"";
+"Solid_Wire_Gauge";"18 to 30 (AWG)";"";
+"Stranded_Wire_Section";"0.0509 to 0.823 (mm²)";"";
+"Packaging";"Box";"";
+"Solid_Wire_Section";"0.0509 to 0.823 (mm²)";"";
+"Insulator_Flammability_Rating";"UL94 V-0";"";
+"Rated_Current_cULus_A";"6";"";
+"Stranded_Wire_Gauge";"18 to 30 (AWG)";"";
+"TraceParts.InstanceId";"90-24032022-063430B53BP6U7P67YB1K2CO4ILZZ2R";"";
+"Insulator_Colour";"Green";"";
+"Contact_Resistance_cULus_mOHM";"20";"";
+"Contact_Plating";"Tin";"";
+"Screw_Nut_Material";"Steel";"";
+"TraceParts.PartVersion";"1.0.3";"";
+"TraceParts.PartLanguage";"en";"";
+"Wire_Strip_Length";"4 up to 5 (mm)";"";
+"Mating_Type";"Fix";"";
+"Standard_Polarities";"02;03;04;05;06;08";"";

4_mCAD/KiCADv6/2025-12-22_02-04-45.kicad_sym

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+    )
+    (property "Datasheet" "https://www.molex.com/en-us/products/part-detail-pdf/397730004?display=pdf" (id 3) (at 0 0 0)
+      (effects (font (size 1.27 1.27) italic) hide)
+    )
+    (property "ki_keywords" "397730004" (id 4) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_locked" "" (id 5) (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_fp_filters" "CONN_SD-39773-001_04P_MOL" (id 6) (at 0 0 0)
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+)
+

4_mCAD/KiCADv6/footprints.pretty/CONN_SD-39773-001_04P_MOL.kicad_mod

@@ -0,0 +1,33 @@
+(footprint "CONN_SD-39773-001_04P_MOL" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tags "397730004 ")
+  (attr through_hole)
+  (fp_text reference "REF**" (at 3.81 0 unlocked) (layer F.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value CONN_SD-39773-001_04P_MOL (at 3.81 0 unlocked) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text user "${REFERENCE}" (at 3.81 0 unlocked) (layer F.Fab)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start -1.7526 -3.754001) (end -1.7526 3.256399) (layer "F.CrtYd") (width 0.1524))
+  (fp_line (start -1.7526 3.256399) (end 9.3726 3.256399) (layer "F.CrtYd") (width 0.1524))
+  (fp_line (start 9.3726 3.256399) (end 9.3726 -3.754001) (layer "F.CrtYd") (width 0.1524))
+  (fp_line (start 9.3726 -3.754001) (end -1.7526 -3.754001) (layer "F.CrtYd") (width 0.1524))
+  (fp_circle (center 0 -4.516001) (end 0.381 -4.516001) (layer "F.Fab") (width 0.508) (fill none))
+  (fp_circle (center -2.5146 0) (end -2.1336 0) (layer "F.SilkS") (width 0.508) (fill none))
+  (fp_circle (center -2.5146 0) (end -2.1336 0) (layer "B.SilkS") (width 0.508) (fill none))
+  (fp_line (start -1.6256 3.129399) (end 9.2456 3.129399) (layer "F.SilkS") (width 0.1524))
+  (fp_line (start 9.2456 3.129399) (end 9.2456 -3.627001) (layer "F.SilkS") (width 0.1524))
+  (fp_line (start 9.2456 -3.627001) (end -1.6256 -3.627001) (layer "F.SilkS") (width 0.1524))
+  (fp_line (start -1.6256 -3.627001) (end -1.6256 3.129399) (layer "F.SilkS") (width 0.1524))
+  (fp_line (start -1.4986 3.002399) (end 9.1186 3.002399) (layer "F.Fab") (width 0.0254))
+  (fp_line (start 9.1186 3.002399) (end 9.1186 -3.500001) (layer "F.Fab") (width 0.0254))
+  (fp_line (start 9.1186 -3.500001) (end -1.4986 -3.500001) (layer "F.Fab") (width 0.0254))
+  (fp_line (start -1.4986 -3.500001) (end -1.4986 3.002399) (layer "F.Fab") (width 0.0254))
+  (pad "1" thru_hole circle (at 0 0) (size 1.6002 1.6002) (drill 1.0922) (layers *.Cu *.Mask))
+  (pad "2" thru_hole circle (at 2.54 0) (size 1.6002 1.6002) (drill 1.0922) (layers *.Cu *.Mask))
+  (pad "3" thru_hole circle (at 5.08 0) (size 1.6002 1.6002) (drill 1.0922) (layers *.Cu *.Mask))
+  (pad "4" thru_hole circle (at 7.62 0) (size 1.6002 1.6002) (drill 1.0922) (layers *.Cu *.Mask))
+)